The present disclosure generally relates to the manufacture of semiconductor devices, and more particularly, to ultraviolet assisted porogen removal and/or curing processes for forming porous low k dielectric materials employed in semiconductor devices.
As semiconductor and other microelectronic devices progressively decrease in size, the demands placed on device components continue to increase. For example, the prevention of capacitive crosstalk between interconnect lines becomes significantly more important with smaller devices. Capacitive crosstalk is generally a function of both the distance between conductors and the dielectric constant (k) of the material (i.e., the insulator) placed in between the conductors. Considerable attention has been focused on electrically isolating the conductors from each other using new insulators having low dielectric constants because although silica (SiO2), which has traditionally been used in such devices because of its relatively low dielectric constant of about 4 and met the requirements of earlier (i.e., larger) applications, it will not be adequate as devices scale down.
To achieve low dielectric constants, one can either use a material that inherently possesses a low dielectric constant, and/or introduce porosity into the material, which effectively lowers the dielectric constant because the dielectric constant of air is nominally 1. Porosity has been introduced in low k materials through a variety of means. A lowering of the k value can be achieved by using high boiling point solvents, by using templates, or by using porogen-based methods. However, the integration of porous low-k materials in the manufacture of the semiconductor device, in general, has proven difficult.
One major issue with porogen-based low k dielectrics lies in the difficulty with removing the porogen without leaving residual porogen fragments and without adversely affecting the rest of the dielectric material or other components in the semiconductor device. The vast majority of methods requires a thermal cure step at temperatures of 300° C. or higher and for durations of 30 minutes or longer to cross-link the film, decompose and/or remove volatile porogen components, and reduce the dielectric constant of the film. These thermal processes may exceed the allowable thermal budgets for device manufacture. Moreover, the introduction of pores into the dielectric material in this manner can reduce the overall mechanical strength, cohesive strength and fracture toughness of the porous dielectric material. In addition to affecting the thermal and mechanical properties, the so-cured porous dielectric materials may have relatively poor moisture resistance and wet etching resistance, an area of concern where improvement is generally desired.
Consequently, other cure techniques and process flows have been developed in an attempt to address these integration issues. For example, processes for forming porous low k dielectrics from porogen based materials have included ultraviolet (UV) or vacuum ultraviolet (VUV) light in combination with an oxygen-containing atmosphere as an alternative to thermal cure processes to create pores within the dielectric material. However, these techniques may degrade or even destroy the resultant film by chemically modifying the non-porogen component of the dielectric material.
Another major issue facing the integration of porous low-k material technology is how to enable pore creation while affording a structure that can withstand other processing steps, such as chemical-mechanical polishing (CMP), wire bonding, dicing, plasma etching, wet processing, diffusion barrier layer deposition, interconnect line deposition, plasma ashing, and chemical and thermal treatments, among others. During subsequent processing, penetration of reactant chemicals and solvents into the pores, contact with abrasives, and the like, can degrade the dielectric film, increase the dielectric constant, and/or leave residues that can further deleteriously affect subsequent manufacturing steps. Many prior art methods attempt to overcome this issue by capping the porous dielectric film layer with one or more thin non-porous dielectric films during device manufacture, which may protect the surface of the porous film layer against damage from a subsequent process such as CMP as well as enhance the lithographic process by providing reflection control and/or added etching selectivity. However, the harsh chemical steps that follow CMP may still degrade the dielectric material or increase the dielectric constant if reactive gases and/or solvents penetrate into the porous film. Moreover, the addition of a capping layer increases the complexity of the device, increases effective k-value, adds an additional process step, increases manufacturing costs, and the like, which are generally undesirable as devices scale to smaller feature sizes.
As such, a successful low-k candidate must display several critical material properties such as, for example, chemical resistance to oxidation and moisture absorption after plasma ashing, stripping and cleaning, and CMP processes; thermal stability (no weight loss or shrinkage following repeated isothermal soaks at, for example, 400° C.); and the ability to adhere to substrates, including liners and barriers, in order to withstand the shearing and delamination forces exerted by the CMP process.
There remains a need in the art to provide improved methods in the manufacture of porogen-based low k dielectric materials for integration into semiconductor devices. Because of at least the problems noted in the prior art, it would be desirable if the methods did not chemically modify the film so as to affect the physical and mechanical properties of the dielectric layer or other device components during porogen removal. It would be more desirable if the methods were more favorable with respect to thermal budget concerns. It also would be advantageous if the methods reduced the integration issues associated with the low k dielectric materials, e.g., eliminates the need for capping layers and the like.